EDN

PLL clock IC offers 10-ps rms jitter

The NB4N507A PLL clock IC generates a clock signal ranging from 50 to 200 MHz via an inexpensive reference crystal. The device offers an rms period jitter of less than 10 ps and an accuracy of 100 ppm ...
EDN

PLL clock generation IC replaces crystal oscillators for clock generation

The NB4N507A is the first in a series of fully-integrated phase lock loop (PLL) ICs designed to replace expensive crystal oscillators for clock generation in a wide variety of consumer and networking ...
Electronic Design

Unconventional PLL Uses BTSC Pilot To Generate Master Clock

Multichannel television sound (MTS), better known as Broadcast Television System Committee (BTSC) encoding, is used in many analog cable set-top boxes for TV. The BTSC pilot is at the same frequency ...
Design And Reuse

Creating a Frequency Plan for a System using a PLL

Perceptia Devices is an IP and design services provider, based in Sydney, Australia and Silicon Valley. It is focused on PLLs for RF systems and demanding clocking applications. Perceptia offers a ...