New non-volatile memory devices store information using different physical mechanisms from those employed in today's memories and could achieve substantial ...

The dynamic interplay between processor speed and memory access times has rendered cache performance a critical determinant of computing efficiency. As modern systems increasingly rely on hierarchical ...

Gaps in the memory hierarchy have created openings for new types of memory, and there is no shortage of possibilities. It’s no secret that today’s memory chips and storage devices are struggling to ...

The announcement this week by Intel and Micron Technology of 3D XPoint memory, which will sit somewhere between DRAM and NAND flash in future systems, has everyone thinking about the architectural, ...

One of the greatest challenges facing the designers of many-core processors is resource contention. The chart below visually lays out the problem of resource contention, but for most of us the idea is ...

Many people have heard the term cache coherency without fully understanding the considerations in the context of system-on-chip (SoC) devices, especially those using a network-on-chip (NoC). To ...

We have been excited about the possibilities of adding tiers of memory to systems, particularly persistent memories that are less expensive than DRAM but offer similar-enough performance and ...

Semiconductor Engineering sat down to discuss future memory with Frank Ferro, senior director of product management for memory and interface IP at Rambus; Marc Greenberg, director of product marketing ...

TOKYO--(BUSINESS WIRE)--Kioxia Corporation, a world leader in memory solutions, today announced that the company’s research papers have been accepted for presentation at IEEE International Electron ...

We all think of the CPU as the "brains" of a computer, but what does that actually mean? What is going on inside with the billions of transistors that make your computer work? In this four-part series ...