In the 1990s, Carnegie Mellon researchers created a comprehensive scan-test cost model that demonstrated how design for test (DFT) contributes to profitability (Ref. 1). With scan compression in wide ...

About a dozen years ago, the world of test had reached an economic impasse: most digital designs had become sufficiently complex that standard scan testing techniques were no longer cost-effective.

IC designers now have a powerful weapon in the struggle against rising test costs: commercially available EDA solutions that provide fast and effective means to implement scan compression on-chip. By ...